KW45

恩智浦

概述

KW45’s three-core architecture integrates a 96 MHz CM33 application core, dedicated CM3 radio core and an isolated EdgeLock Secure Enclave. The Flash-based radio core with dedicated SRAM delivers a highly configurable and upgradeable software-implemented radio, freeing resources on the main core for customer application space.

The Bluetooth Low Energy 5.3-compliant radio supports up to 24 simultaneous secure connections. The EdgeLock Secure Enclave’s isolated execution environment provides a set of cryptographic accelerators, key store operations and secure lifecycle management that minimizes main core security responsibilities.

The KW45 MCU additionally integrates FlexCAN, helping enable seamless integration into an automobile’s in-vehicle or industrial CAN communication network. The FlexCAN module can support CAN’s flexible data rate (CAN FD) for increased bandwidth and lower latency.

特性

Application Core
Up to 96 MHz Arm Cortex-M33 core
1 MB Program Flash
128 kB SRAM
Nested Vectored Interrupt Controller (NVIC)

Radio Core
Dedicated CM3 core
Secure 256 kB Flash for authenticated NXP Bluetooth Low Energy controller stack firmware
88 kB dedicated SRAM
2.4 GHz Bluetooth Low Energy Version 5.3 upgradeable radio supporting up to 24 simultaneous hardware connections in any central/peripheral combination
–106 dBm 125 kbps Long Range Receive Sensitivity
–102 dBm 500 kbps Long Range Receive Sensitivity
–97.5 dBm 1 Mbps Receive Sensitivity
–95 dBm 2 Mbps Receiver Sensitivity
Programmable Transmit Output Power up to +10 dBm
Data Rates: 125 kbps, 500 kbps, 1 Mbps and 2 Mbps
Modulation Types: 2 Level FSK, GFSK, MSK, GMSK
On-chip balun with single ended bidirectional RF port

特性

802.15.4 (Zigbee, Thread)

应用说明

• Automotive

— Secure Car Access

— Keyless Entry

— Passive Entry/Passive Start (PEPS) Systems

— Wireless Battery Management Systems (WBMS)

• Industrial/IoT

— Positioning/Localization

— Building Control and Monitoring

— Process/Factory Automation

内核

Arm® Cortex®-M33

CPU时钟频率

__

CPU构造

__

CPU特性

__

蓝牙版本

5.3

频率

96 MHz

Flash (kB)

256

缓存

-

SRAM (kB)

__

EEPROM (kB)

__

调试

__

升级方式

Manual

晶振

no

PLL时钟

no

可选晶振

no

RC时钟

no

外部时钟

no

时钟 [数量, 位]

32 MHz supported for Bluetooth LE and Generic FSK modes

实时时钟

32.768 kHz Crystal Oscillator

看门狗计数器

no

GPIO

__

针脚

__

针距

__

通道

__

ADC [数量, 位]

__

真随机数发生机器

__

模拟组件

no

低功耗组件

no

温度传感器

no

NFC标签

__

SPI

Two LSPI

DAC [数量, 位]

__

UART

Two LPUART

同步串行接口

__

PWM [数量, 位]

__

I2C

Two Low Power I2C (LPI2C) modules supporting the System Management Bus (SMBus) Specification, version 2

TWI

no

QDEC

-

PDM

-

USB

no

SPI

Two Low Power SPI modules and one MIPI-I3C module

Quad SPI

-

I2S

no

调试界面

-

人机界面

-

可编程通道

__

固定通道

__

通道组

__

电压 [最小~最大] (V)

__

no

VBUS

no

可调供电输出

-

电源失效

no

加密加速计

__

公钥硬件加速器

__

加速器

__

安全

__

__

电流

__

传感器控制器

__

待机

__

兼容标准

__

接收器灵敏度

–95 dBm 2 Mbps Receiver Sensitivity

输出功率

+10 dBm

射频规范

__

协议

-

蓝牙5性能

-

蓝牙5.1支持

-

尺寸

6 x 6 mm 40HVQFN,7 x 7 mm 48HVQFN

封装型式

HVQFN, 48HVQFN

DSP RAM

__

DSP时钟速度

__

DSP时钟速度

__

音频控制

__

概要

__