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TI
当使能CACHE_AS_RAM 功能时,我的项目编译正常,但无法运行。 这是什么原因导致的?
当使能CACHE_AS_RAM 功能时,我的项目编译正常,但无法运行。 这是什么原因导致的?
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btt
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27 Sep 2020 19:52
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btt
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打开内存浏览器,找到rfRegTbl 的位置。如果您看到rfRegTbl 的起始地址不是4 字节对齐的,则整个rfRegTbl 都会倾斜。RF Core(M0)需要所有地址都是4 字节对齐,否则RFcore 会崩溃。要解决此问题,请在ble_user_config.c 中的 rf override table 前面添加“ #pragma DATA_ALIGN(rfRegTbl, 4)”。
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当使能CACHE_AS_RAM 功能时,我的项目编译正常,但无法运行。 这是什么原因导致的?